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Read-only netlist queries and electrical rule checks over Cadence, Altium and KiCad schematics
By IntelligentElectron TypeScript Local · stdio Developer tools
49 popularity score ★ 64 ↓ 589/wk
Opens the app, which asks before it adds the server.
claude mcp add universal-netlist -- npx -y @intelligentelectron/universal-netlist{
"mcpServers": {
"universal-netlist": {
"command": "npx",
"args": [
"-y",
"@intelligentelectron/universal-netlist"
]
}
}
}{
"mcpServers": {
"universal-netlist": {
"command": "npx",
"args": [
"-y",
"@intelligentelectron/universal-netlist"
]
}
}
}{
"servers": {
"universal-netlist": {
"type": "stdio",
"command": "npx",
"args": [
"-y",
"@intelligentelectron/universal-netlist"
]
}
}
}[mcp_servers.universal-netlist]
command = "npx"
args = ["-y", "@intelligentelectron/universal-netlist"]gemini mcp add --scope user universal-netlist npx -- -y @intelligentelectron/universal-netlistUNIVERSAL_NETLIST_DSN_PASSWORD secret |
Optional: Password for an OrCAD .DSN saved with one. |
|---|---|
UNIVERSAL_NETLIST_DSN_PASSWORD_FILE |
Optional: Path to a text file with one OrCAD design password per line, tried after UNIVERSAL_NETLIST_DSN_PASSWORD. |
KICAD_CLI_PATH |
Optional: Where kicad-cli lives when it is not in the standard place. |
KICAD_CLI_TIMEOUT |
Optional: Time limit for a kicad-cli run in milliseconds. |
UNIVERSAL_NETLIST_CACHE_ENTRIES |
Optional: How many parsed designs the server keeps in memory between queries, 0 turns the cache off. |
This server turns schematics on your disk into a netlist an assistant can question. Ask which parts sit on a net. Ask what is wired to pin U2.10, or have it trace the circuit outward from a net, search parts by refdes or part number, and run a set of electrical rule checks. It is built for design reviews done as a conversation.
It reads OrCAD/CIS .DSN files and Altium .PrjPcb projects directly, without a Cadence or Altium install. KiCad works too: a committed .net export is used when present, otherwise it parses the KiCad 6 to 10 schematics itself, and kicad-cli is just the fallback. Its open .netlist.json format is the fourth input. Variants such as Do Not Stuff parts or Altium alternates are chosen per query through design_variant. Password-protected OrCAD files take their password from environment variables, never from a tool argument.
In the code (src/tools/index.ts) there are 11 tools, all annotated read-only, and their schemas are strict: an unknown argument gets refused instead of silently dropped. A twelfth, export_cadence_netlist, sits in the source but a build flag in src/features.ts removes it, and nothing at runtime brings it back. A few defaults matter. list_designs walks folders to any depth unless you pass max_depth, and stops at 50 results unless max_results is raised. Searches include Do Not Stuff parts by default. The two trace tools and run_erc skip them unless include_dns is true.
Each tool doubles as a shell command of the same binary, which also has export_design for writing one build of a design to .netlist.json.
| Runtime | A prebuilt binaryNode.js 22.15+ |
|---|---|
| Runs on | macOS, Windows, Linux |
| Also |
|
Use one of the two: the standalone binary from the project's install script (macOS arm64 and x64, Linux x64 and ARM64, Windows x64, no Node.js needed) or the npm package, which needs Node.js 22.15 or later. The docs warn to install it one way only, since the plugin runs the first universal-netlist on PATH. Design files must be on the local disk.
It analyses connectivity only: voltage ratings, tolerances and other electrical specifications are not in its data model and are left to datasheets. It does not edit schematics. Net naming drives power/ground detection and where circuit traces stop, so results depend on the schematic following the project's net naming conventions. list_designs returns 50 designs by default. Run by hand in a terminal with no command, the binary prints setup help instead of serving; MCP clients start it normally.
Hardware engineers with OrCAD, Altium or KiCad schematics on their own machine who want to ask about parts, nets and connectivity, or run a rule check, without opening the EDA tool or holding a licence. All offered tools only read, so it is a reasonable fit for reviewing designs you do not want touched. Look elsewhere for PCB layout, simulation, schematic editing or component specifications, none of which it covers.
11 only read. A ? marks an optional parameter.
list_designspath?: stringpattern?: stringmax_depth?: integermax_results?: integerlist_componentsdesign: stringtype: stringinclude_dns?: booleandesign_variant?: stringlist_netsdesign: stringdesign_variant?: stringsearch_netspattern: stringdesign: stringdesign_variant?: stringsearch_components_by_refdespattern: stringdesign: stringinclude_dns?: booleandesign_variant?: stringsearch_components_by_mpnpattern: stringdesign: stringinclude_dns?: booleandesign_variant?: stringsearch_components_by_descriptionpattern: stringdesign: stringinclude_dns?: booleandesign_variant?: stringquery_xnet_by_net_namedesign: stringnet_name: stringskip_types?: arrayinclude_dns?: booleandesign_variant?: stringquery_xnet_by_pin_namedesign: stringpin_name: stringskip_types?: arrayinclude_dns?: booleandesign_variant?: stringquery_componentdesign: stringrefdes: stringdesign_variant?: stringrun_ercdesign: stringinclude_dns?: booleaninclude_rules?: arrayexclude_rules?: arraydesign_variant?: string